A lone engineer just booted a 60-year-old rival to binary chips
While the planet’s fabs spit out trillion-transistor GPUs locked in a nanometre arms race, Claudio Lorenzo La Rosa has spent his nights coaxing a forgotten numeral system back to life on a $79 open-source board. The result—5500FP—is the first general-purpose ternary processor to execute code since Nikita Khrushchev’s Moscow, and it ran a Mandelbrot demo at 20 MHz without crashing once.
Why ternary never died, it just went underground
Binary’s victory in the 1960s was a supply-chain accident, not a theorem. CMOS lines already etched millions of N-type/P-type pairs; asking them to fabricate three-state transistors meant junking the entire pipeline. La Rosa sidesteps that legacy by mapping each trit (-1, 0, +1) onto two ordinary LUTs inside a Lattice FPGA. The hack costs 40 % more silicon per digit, yet still delivers the theoretical 1.58× information density that Donald Knuth once called “the most elegant way to count”.
elegance does not equal gigahertz. 5500FP tops out at twenty megahertz, a speed your smartwatch beat ten generations ago. But clock cycles are not the point. The chip natively handles balanced arithmetic: negative numbers flip sign without two’s-complement acrobatics, cutting adder latency by 30 % for workloads such as FIR filters or gradient updates in tiny neural nets. In a demo La Rosa streamed from his garage, a 24-trit multiply-accumulate unit cranked 512-point convolution using half the FPGA’s fabric—and 38 % fewer toggles—than an identical binary circuit.
What happens if the foundries pick up the phone
He has already shipped the RTL to SkyWater’s 130 nm shuttle this autumn; at that node a full-tape ternary cell library could push 400 MHz while sipping dynamic power through three voltage rails (-0.6 V, 0 V, 0.6 V). The foundry’s standard-cell flow needs only a tweaked DRC deck; no exotic doping, no new laser. If yield matches academic projections, a 1 mm² die could rival a 0.7 mm² binary DSP on energy per MAC, narrowing the gap that killed Setun in 1965.
La Rosa is not naive. “I’m not replacing Grace Hopper’s universe,” he told me over Signal. “I’m poking it to admit there was a fork in the road.” Venture firms yawned until he published a 3-bit divider that outperforms binary at ISO 9001 precision for embedded motor control. Now a European automotive Tier-1 wants samples for inverter firmware, where balanced ternary trims lookup tables and slashes electromagnetic noise.
Binary’s lock-in was economic, not cosmic
The takeaway is blunt: the semiconductor trajectory we call inevitable is simply the one that got funded first. A grad student with a JTAG cable just proved an entire computational paradigm can be resurrected for the price of a weekend drone. The fabs, the EDA vendors, the hyperscalers already own the roadmap to 0.7 nm; they also own the option to hit pause and ask whether every watt burned on sign-extension is a watt worth saving. La Rosa’s 20 MHz prototype will not dent their revenue this quarter. It has already dented their excuse.